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spiflashcontroller_latest.tar
- This VHDL module implements a state controller for a serial (SPI) Flash ROM
rom_table
- rom vector table vhdl and Testbench
RAM_Examples
- Verilog hdl code for representing ram and rom "memory" using many methods
ADC0809VHDL
- 8.4 ADC0809 VHDL控制程序 见随书所附光盘中文件:ADC0809VHDL程序与仿真。 --文件名:ADC0809.vhd --功能:基于VHDL语言,实现对ADC0809简单控制 --说明:ADC0809没有内部时钟,需外接10KHz~1290Hz的时钟信号,这里由FPGA的系 --统时钟(50MHz)经256分频得到clk1(195KHz)作为ADC0809转换工作时钟。 --最后修改日期:2004.3.20 -8.4 ADC0809 VHDL con
1
- VGA01目录下有TTOP.BIN,下载后有如下效果: 插上显示屏: 屏幕显示两层图片,下层是静态的两个字,我的名字。 上层是一个128X64的256色图片, 插上键盘: 按键盘大键盘区的1-9,板子上的7段会有显示数字,按<-删除键删除一个数字。 visualC目录下是一个小程序,将BMP转换成rom.mif ROM存储器初始化文件。-VGA01 directory under TTOP.BIN, download the following ef
DDS
- 本代码可以用于产生正余弦信号波形,利用FPGA内部的ROM放置一个正余弦采样点的数据表格,通过循环取址的方法,实现波形连续输出。-This code can be used to generate positive cosine signal waveforms, using FPGA' s internal ROM to place a sampling point is the cosine of the data tables, the circulation method of t
sine_wave_generator_using_FPGA_implementation
- 该资料介绍了用FPGA实现正弦波发生器,原理是利用内置rom表,通过查询的方式实现输出,然后经过外部DAC输出,频率达到1MHz-The information on the sine wave generator using FPGA implementation, the principle is the use of built-in rom form, by querying the means to achieve the output, and then an external DA
spartan6_fpga_blockram_user_guide
- Spartan6 FPGA中的块存储器使用指南,可以构建为FIFO,ROM,RAM,移位寄存器等。-Spartan6 FPGA block memory in the User Guide, you can build for FIFO, ROM, RAM, shift registers and so on.
LPC2DDR2
- Module Function Descr iption: This module allows a SPI ROM to be used in a LX/CS5536 system. Details are below: 1.Provide a memory window to the SPI EPROM at FFF80000h-FFFFFFFFh (512KB). 2.Provide an interface to the SPI bus to allow the
DS18B20
- 8位单片机与DS18B20并行双向通信。 Quartus II 8.1项目工程文件. 主源程序文件为DS18B20.v,里面有详细注解。 例子: DS18B20 数据地址 0xf000(ROM=0) DS18B20 ROM指令地址 0xf001(ROM=1) 外部电源供电且只有一DS18B20的读取法: 发送CC到0xf001, 等待busy=0说明器件已准备好, 读0xf001的Bit1=1说明存在器件,Bit0=1为控制忙(可以省略此步) 发送44
emny
- cpld/fpga vhdl语言rom 引用的简单例子-cpld/fpga vhdl language rom cited a simple example
DE2_disc.part1
- DE2光盘资料,请把 part1-part3全下载下来,然后放到一起解压,文件太大,谅解!-DE2 CD-ROM, please download part1-part3 all down, and then put together with decompression, file is too large, understanding!
DE2_disc.part2
- DE2光盘资料,请把 part1-part3全下载下来,然后放到一起解压,文件太大,-DE2 CD-ROM, please download part1-part3 all down, and then put together with decompression, file is too large,
BS
- 用EDA设计ROM和RAM及其应用,用VHDL语言编程实现字符、汉字的存取并用点阵显示-ROM and RAM design with the EDA and its applications, using VHDL programming language characters, Chinese characters, access to and use dot-matrix display
ROM
- FPGA内部储存,源代码。 FPGA内部储存,源代码。-FPGA
rom
- 用VHDL编写一个具有正弦波形产生功能的rom.-Written with VHDL generate a sine function of rom.
VHDLcodes
- Behavioral descr iption of ALU, RAM MODULE, ROM MODULE, DIVIDE BY N COUNTER, GENERIC DIVIDER 2n+1, GCD CALCULATOR, GCD FSM CODE, JK FLIP FLOP in VHDL . These are fully synthesized codes with optimization.- Behavioral descr iption of ALU, RAM MODULE,
rom
- 64采样点的正弦表存储区。外接地址可以输出正弦信号采样点经过二进制补码转换后的幅度值。-sine table by 64 samples in VHDL.
sine-generator
- ROM型正弦信号发生器,从rom中读取正弦波的点,循环输出,经AD生成波形,环境为quartus-sine generator in quartus
aahr
- vhdl下编写的rom,vhdl专用这个编程能帮你学习到老-it s very good!when you download this one ,it s good for your study